Digital
Logic Design (CS302)
Assignment # 02
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Deadline
Date
18 July, 2016
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Please carefully read the
following instructions before attempting assignment.
RULES
FOR MARKING
It should be clear that your
assignment would not get any credit if:
You should concern the recommended books to clarify
your concepts as handouts are not sufficient.
You are supposed to submit
your assignment in .doc or docx format.
Any
other formats like scan images, PDF, zip, rar, ppt and bmp etc will not be
accepted.
Topic Covered:
·
Multiplexor
·
Demultiplexor
·
ABEL
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NOTE
No assignment will be
accepted after the due date via email in any
case (whether it is the case of load shedding or internet
malfunctioning etc.). Hence refrain from uploading assignment in the last
hour of deadline. It is recommended to upload solution file at least two days
before its closing date.
If you people find any
mistake or confusion in assignment (Question statement), please consult with
your instructor before the deadline. After the deadline no queries will be
entertained in this regard.
For any query, feel free to
email at:
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ASSIGNMENT
SCENARIO
Suppose we have a circuit having following attributes:
- 16 inputs (A0-A15)
- 1 Output (Y)
- 4 selectors (S0-S3)
The circuit has been defined using the following truth table.
INPUTS
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OUTPUT
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S0
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S1
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S2
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S3
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Y
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0
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0
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0
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0
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A0
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0
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0
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0
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1
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A1
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0
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0
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1
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0
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A2
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0
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0
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1
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1
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A3
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0
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1
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0
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0
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A4
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0
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1
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0
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1
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A5
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0
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1
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1
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0
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A6
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0
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1
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1
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1
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A7
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1
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0
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0
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0
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A8
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1
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0
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0
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1
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A9
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1
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0
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1
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0
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A10
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1
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0
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1
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1
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A11
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1
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1
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0
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0
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A12
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1
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1
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0
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1
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A13
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1
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1
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1
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0
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A14
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1
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1
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1
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1
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A15
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QUESTION
STATEMENT
You are required to draw the circuit diagram for
the provided scenario; also write ABEL code for the designed circuit.
Solution:
Assignment By Tahir Siddiqui(Mani)
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